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	<title>Off you go... into the purple yonder! &#187; coreboot</title>
	<atom:link href="https://ward.vandewege.net/blog/category/coreboot/feed/" rel="self" type="application/rss+xml" />
	<link>https://ward.vandewege.net/blog</link>
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		<title>howto: replace a PLCC chip with a socket &#8220;ghetto style&#8221;</title>
		<link>https://ward.vandewege.net/blog/2009/03/howto-replace-a-plcc-chip-with-a-socket-ghetto-style/</link>
		<comments>https://ward.vandewege.net/blog/2009/03/howto-replace-a-plcc-chip-with-a-socket-ghetto-style/#comments</comments>
		<pubDate>Sun, 01 Mar 2009 01:04:19 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>
		<category><![CDATA[Hardware]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/?p=372</guid>
		<description><![CDATA[I used Peter Stuge&#8217;s &#8220;ghetto&#8221; method to replace a PLCC bios chip with a socket on an asus m2a-2vm board. This board has excellent coreboot support. The method basically consists of cutting off the legs of the PLCC chip as &#8230; <a href="https://ward.vandewege.net/blog/2009/03/howto-replace-a-plcc-chip-with-a-socket-ghetto-style/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I used <a href="http://stuge.se">Peter Stuge&#8217;s</a> &#8220;ghetto&#8221; method to replace a PLCC bios chip with a socket on an <a href="http://www.asus.com/products.aspx?l1=3&#038;l2=101&#038;l3=496&#038;l4=0&#038;model=1568&#038;modelmenu=1">asus m2a-2vm</a> board. This board has excellent <a href="http://coreboot.org">coreboot</a> support.</p>
<p>The method basically consists of cutting off the legs of the PLCC chip as close to the package as possible, so as to minimize strain on the paths on the motherboard while cutting. After that, the legs can easily be de-soldered from the board, and it&#8217;s trivial to solder on a PLCC socket. Obviously you loose the PLCC chip in the process, but this method is a lot easier than removing the PLCC chip with a heat gun. It&#8217;s also safer for the surrounding components.</p>
<p>Here are some photos:</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9362.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9362.jpg' alt='PLCC chip before removal' width='455' height='322' class='centered' /></a><br />
The chip prior to modification.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9365.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9365.jpg' alt='PLCC chip with some legs cut off' width='450' height=322' class='centered' /></a><br />
Legs cut off on two sides of the chip. It&#8217;s important to use the right cutter for this job &#8211; it needs to be able to cut very closely to the package of the chip. I used a <a href="http://hmcelectronics.com/cgi-bin/scripts/query.cgi?query=+%09+TR20M">Hakko CHP Ergonomic Micro Cutter</a>, part number TR20M.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9368.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9368.jpg' alt='PLCC chip removed' width='450' height='322' class='centered' /></a><br />
PLCC chip removed.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9381.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9381.jpg' alt='PLCC chip without legs' width='450' height='322' class='centered' /></a><br />
PLCC chip without legs.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9375.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9375.jpg' alt='legs de-soldered from board' width='430' height='600' class='centered' /></a><br />
The legs have been de-soldered. If you look carefully near pins 1 and 2 on the top row, you&#8217;ll see I was foolish and used too much force and a too small soldering tip while de-soldering. I damaged the board. Luckily the pins involved are all on the same big pad, and everything still works.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9377.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9377.jpg' alt='the socket prior to soldering' width='450' height='322' class='centered' /></a><br />
This is the socket prior to soldering. I had to remove the plastic &#8216;floor&#8217; of the socket in the center to allow easy access to the pins for soldering. You can put that piece of plastic back in the socket after it has been soldered onto the board, even loose. It will prevent PLCC chips from being pushed too deep into the socket, where not all pins might make contact with the socket.</p>
<p><a href='https://ward.vandewege.net/blog/wp-content/photos/dscn9383.jpg' title='plcc-desoldering-1'><img src='https://ward.vandewege.net/blog/wp-content/photos/dscn9383.jpg' alt='socket installed' width='430' height='600' class='centered' /></a><br />
The PLCC socket, installed.</p>
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		<title>kexec&#8217;ing into a Xen kernel</title>
		<link>https://ward.vandewege.net/blog/2008/08/kexecing-into-a-xen-kernel/</link>
		<comments>https://ward.vandewege.net/blog/2008/08/kexecing-into-a-xen-kernel/#comments</comments>
		<pubDate>Fri, 08 Aug 2008 01:13:29 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>
		<category><![CDATA[Xen]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/?p=217</guid>
		<description><![CDATA[I&#8217;ve got a number of servers that run coreboot + Xen. I like to run coreboot with a linux-as-a-bootloader (LAB) payload. That means that coreboot, after bringing up the machine, boots into a small linux kernel + busybox environment, entirely &#8230; <a href="https://ward.vandewege.net/blog/2008/08/kexecing-into-a-xen-kernel/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I&#8217;ve got a number of servers that run <a href="http://coreboot.org">coreboot</a> + <a href="http://xen.org">Xen</a>. I like to run coreboot with a linux-as-a-bootloader (LAB) payload. That means that coreboot, after bringing up the machine, boots into a small linux kernel + busybox environment, entirely contained in rom. That environment can serve as an emergency fallback to resolve booting problems remotely &#8211; remember, coreboot has excellent serial support from power-on. Anyway; on a normal boot the machine kexecs into a Xen kernel.</p>
<p>And that works great. Recently, on deploying a new server, I discovered that the machine would just hang trying to kexec into Xen 3.2.1.</p>
<p>After a lot of digging and some fun setting up a test environment with <a href="http://bellard.org/qemu/">qemu</a>, I discovered that this broke somewhere between Xen 3.1.0 and 3.1.3. A message to the Xen-devel mailing list today yielded a <a href="http://lists.xensource.com/archives/html/xen-devel/2008-08/msg00300.html">quick response</a> from a Xen developer suggesting I try the &#8216;no-real-mode&#8217; parameter as an argument to the hypervisor.</p>
<p>The no-real-mode option stops Xen from doing some bios calls, and it also tells it to ignore the e820 bios table.</p>
<p>Here&#8217;s an lab.conf that works:</p>
<pre>
CMDLINE="no-real-mode com1=115200,8n1 cdb=com1"
INITRD=""
KERNEL="/xen-3.1.4.gz"
MODULE1="/vmlinuz-2.6.18.8-xen root=/dev/md1 ro xencons=ttyS0 console=tty0 console=ttyS0,115200"
MODULE2="/initrd.img-2.6.18.8-xen"
</pre>
<p>Note that you need to pass no-real-mode as the <i>first</i> xen command line argument, otherwise it won&#8217;t work.</p>
<p>And somehow that solves the problem for Xen 3.1.3 and 3.1.4, both under qemu + coreboot and qemu + bochs. Kexec&#8217;ing into Xen 3.1.2 triple-faults qemu under qemu + coreboot, but works fine under qemu + bochs. That smells like a coreboot bug. I&#8217;ll try on real hardware tomorrow to see if this bug is specific to our qemu port, or a more general coreboot problem. To be continued..</p>
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		<item>
		<title>new coreboot logo</title>
		<link>https://ward.vandewege.net/blog/2008/07/new-coreboot-logo/</link>
		<comments>https://ward.vandewege.net/blog/2008/07/new-coreboot-logo/#comments</comments>
		<pubDate>Tue, 01 Jul 2008 07:16:34 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2008/07/01/193/</guid>
		<description><![CDATA[It&#8217;s official &#8211; we have a new logo! Many thanks to the folks who made this happen: * Konsult Stuge * coresystems GmbH * Kitchener Waterloo Linux User Group and Richard Weait * Breakfast Design]]></description>
				<content:encoded><![CDATA[<p>It&#8217;s <a href="http://www.coreboot.org/pipermail/coreboot/2008-July/036204.html">official</a> &#8211; we have a new logo!</p>
<p><a href="http://coreboot.org"><img src="http://www.coreboot.org/images/7/75/Coreboot_full_web.png" alt="Coreboot Logo" border="0"/></a></p>
<p>Many thanks to the folks who made this happen:</p>
<p>   * <a href="http://stuge.se">Konsult Stuge</a><br />
   * <a href="http://coresystems.de">coresystems GmbH</a><br />
   * <a href="http://kwlug.org">Kitchener Waterloo Linux User Group</a> and Richard Weait<br />
   * <a href="http://www.breakfastdesign.nu/">Breakfast Design</a></p>
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		<title>coreboot update</title>
		<link>https://ward.vandewege.net/blog/2008/04/coreboot-update/</link>
		<comments>https://ward.vandewege.net/blog/2008/04/coreboot-update/#comments</comments>
		<pubDate>Fri, 18 Apr 2008 00:43:39 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2008/04/18/187/</guid>
		<description><![CDATA[The coreboot symposium in Denver was a success. As I announced during my talk there, Silicon Mechanics has pledged to ship servers with coreboot preinstalled &#8211; more in particular, their Rackform nServ A236 model, which is a 1U pizzabox with &#8230; <a href="https://ward.vandewege.net/blog/2008/04/coreboot-update/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>The <a href="http://www.coreboot.org/Coreboot_Symposium_2008">coreboot symposium</a> in Denver was a success. As I announced during my talk there, <a href="http://siliconmechanics.com">Silicon Mechanics</a> has pledged to <a href="http://www.fsf.org/blogs/sysadmin/corebootserver">ship servers with coreboot preinstalled</a> &#8211; more in particular, their <a href="http://www.siliconmechanics.com/i7045/opteron-server.php">Rackform nServ A236 model</a>, which is a 1U pizzabox with a nice dual-socket F Opteron board by supermicro. I&#8217;ve got a bunch of those machines in production running coreboot, and they&#8217;re pretty awesome.</p>
<p>Marc&#8217;s <a href="http://www.coreboot.org/images/6/60/Coreboot_summit_08.pdf">AMD talk</a> [PDF] was fascinating &#8211; AMD&#8217;s really behind coreboot, and there is a lot of hardware support in the pipeline. Awesome stuff.</p>
<p>Finally, we also ported a new board to v3: support for the PC Engines <a href="http://pcengines.ch/alix2c3.htm">Alix.2C3</a> is now in the <a href="http://www.coreboot.org/Download_coreboot">coreboot v3 tree</a>. It&#8217;s not perfect yet &#8211; there&#8217;s an irq conflict between the usb ports and eth2 that needs to be sorted out, but we hope to fix that shortly and other than that it works great.</p>
<p>Update 2008-04-18: this is the <a href="http://www.siliconmechanics.com/i17581/news/april-18-2008.php">Silicon Mechanics press release</a>.</p>
<p>Update 2008-05-09: the irq issues on the alix.2c3 are resolved. Get revision 680 or higher.</p>
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		<title>nokia E70 + bluetooth + evince</title>
		<link>https://ward.vandewege.net/blog/2008/03/nokia-e70-bluetooth-evince/</link>
		<comments>https://ward.vandewege.net/blog/2008/03/nokia-e70-bluetooth-evince/#comments</comments>
		<pubDate>Sun, 30 Mar 2008 23:19:47 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/?p=185</guid>
		<description><![CDATA[I&#8217;m going to the Coreboot symposium 2008 in a few days, where I&#8217;ll give a talk titled &#8216;the view from the FSF&#8217;. I rarely give presentations so I figured I&#8217;d better spend some time to configure my laptop (a Dell &#8230; <a href="https://ward.vandewege.net/blog/2008/03/nokia-e70-bluetooth-evince/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I&#8217;m going to <a href="http://www.coreboot.org/Coreboot_Symposium_2008">the Coreboot symposium 2008</a> in a few days, where I&#8217;ll give a talk titled &#8216;the view from the FSF&#8217;.</p>
<p>I rarely give presentations so I figured I&#8217;d better spend some time to configure my laptop (a Dell 1420N) properly. The first step was easy &#8211; the Fn-F8 CRT/LCD button just works &#8211; it duplicates the LCD output onto the external VGA connector. I had never tried this before <img src="https://ward.vandewege.net/blog/wp-includes/images/smilies/icon_smile.gif" alt=":)" class="wp-smiley" /> </p>
<p>I&#8217;m writing my talk in <a href="http://www.openoffice.org/product/impress.html">OpenOffice.org Impress</a>, which I then export to PDF and show in <a href="http://www.gnome.org/projects/evince/">Evince</a>&#8216;s excellent presentation mode.</p>
<p>I wanted to be able to control the slideshow via Bluetooth with my phone, a Nokia E70 &#8211; and it turns out that&#8217;s easy with the excellent <a href="http://anyremote.sourceforge.net/">anyRemote</a> software. <a href="http://ward.vandewege.net/blog/2007/09/28/155/">I already had bluetooth working</a> for obex file transfers between the phone and the computer.</p>
<p>While connecting to the phone from the computer worked fine for file transfers, I could not connect from the phone to the computer. The phone gave me the message that the computer was an &#8216;unsupported device&#8217;. Redoing the bluetooth pairing seemed to fix that, I&#8217;m not sure yet why.</p>
<p>Making sure that the computer is discoverable can be done with:</p>
<p>  hciconfig hci0 piscan</p>
<p>I also had to tell the computer to switch to &#8216;security mode 3&#8242; and enable authentication and encryption:</p>
<p>  hciconfig hci0 auth<br />
  hciconfig hci0 encrypt</p>
<p>Here&#8217;s what I did:</p>
<p>* installed anyremote, anyremote-docs, anyremote-j2me-client and ganyremote debian packages from <a href="http://sourceforge.net/project/showfiles.php?group_id=162923">the anyRemote download area on sourceforge</a>.<br />
* copied /usr/share/anyremote-J2ME-client/anyRemote64.jar to the phone via obex, and installed it on the phone. This is the anyRemote client.<br />
* copied nokia-e70.cfg and keyboard.cfg from the cfg-data subdirectory of the anyremote tarball to /etc/anyremote (these files are not in the anyremote debian package for some reason)<br />
* started up ganyremote, and pointed it at /etc/anyremote for config files; made sure to have it show &#8216;examples&#8217; in the application list<br />
* start anyRemote from ganyremote<br />
* use the gAnyRemote device browser to locate the phone; configured it to always run the nokia E70 sample application when it sees the phone<br />
* started up the anyRemote client on the phone; searched for computer, found it, connected to it</p>
<p>With the E70 application selected, you essentially get bluetooth keyboard functionality. With the &#8216;keyboard&#8217; application selected, you get a few keys mapped to the numeric phone keypad.</p>
<p>With this, I can put Evince in presentation mode and move between slides by using the phone&#8217;s joystick. If I leave the gAnyRemote application running I just have to connect to the computer from the phone, fire up the anyRemote client, and I&#8217;m in business.</p>
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		<title>gigabyte m57sli-s4 and linuxBIOS: now easier</title>
		<link>https://ward.vandewege.net/blog/2007/09/gigabyte-m57sli-s4-and-linuxbios-now-easier/</link>
		<comments>https://ward.vandewege.net/blog/2007/09/gigabyte-m57sli-s4-and-linuxbios-now-easier/#comments</comments>
		<pubDate>Sun, 16 Sep 2007 16:11:16 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2007/09/16/152/</guid>
		<description><![CDATA[I checked in some code to add support for the m57sli-s4 to buildrom, the LinuxBIOS kconfig-style configuration tool that allows easy building of rom images. FILO and linux-as-a-bootloader (LAB &#8211; i.e. a linux kernel + busybox in the ROM chip) &#8230; <a href="https://ward.vandewege.net/blog/2007/09/gigabyte-m57sli-s4-and-linuxbios-now-easier/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I checked in some code to add support for the m57sli-s4 to buildrom, the <a href="http://linuxbios.org">LinuxBIOS</a> kconfig-style configuration tool that allows easy building of rom images. FILO and linux-as-a-bootloader (LAB &#8211; i.e. a linux kernel + busybox in the ROM chip) are now supported via buildrom, and the <a href=" http://linuxbios.org/GIGABYTE_GA-M57SLI-S4_Build_Tutorial">build tutorial</a> has been updated to reflect this change.</p>
<p>Using buildrom makes building a ROM image very simple &#8211; it&#8217;s a matter of doing </p>
<p>  make menuconfig</p>
<p>and then selecting the relevant options, followed by</p>
<p>  make</p>
<p>The major obstacle for this board remains the hardware &#8211; some soldering is required, and the newer revisions of the board have a new kind of ROM chip that flashrom can not handle yet. But we&#8217;re going to work on that.</p>
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		<title>flashing a soekris 4801 &#8211; or how yet another proprietary BIOS sucks</title>
		<link>https://ward.vandewege.net/blog/2007/06/flashing-a-soekris-4801-bios-or-how-yet-another-proprietary-bios-sucks/</link>
		<comments>https://ward.vandewege.net/blog/2007/06/flashing-a-soekris-4801-bios-or-how-yet-another-proprietary-bios-sucks/#comments</comments>
		<pubDate>Sat, 09 Jun 2007 03:28:12 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>
		<category><![CDATA[Free Software/Open Source]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2007/06/09/137/</guid>
		<description><![CDATA[I got a Soekris 4801-60 for use as a firewall/gateway at one of my (very) remote setups. These things are reliable, very low power, and they have no moving parts if you boot off compact flash. They are Geode-based, so &#8230; <a href="https://ward.vandewege.net/blog/2007/06/flashing-a-soekris-4801-bios-or-how-yet-another-proprietary-bios-sucks/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I got a <a href="http://soekris.com/net4801.htm">Soekris 4801-60 </a>for use as a firewall/gateway at one of my (very) remote setups. These things are reliable, very low power, and they have no moving parts if you boot off compact flash. They are Geode-based, so it&#8217;s x86. You can run the various flavors of BSD on them, or your favorite GNU/Linux distro. There is no VGA out, only a serial port for console access. The (text) console is automatically redirected to the serial port, which is very convenient. All in all, great little boxes. </p>
<p>But they still have a proprietary BIOS. This particular 4801 came with BIOS version 1.29, which was succeeded by version 1.30, with these errata:</p>
<p>  comBIOS vers 1.30<br />
  * fixed bug from 1.29 with LBA disk translation<br />
  * fixed net48xx Serial COM1 RI noise SMI lockup</p>
<p>I was having problems with grub on a compactflash card &#8211; grub error 16, which means corrupt filesystem, which is not the case. I came across <a href="http://lists.soekris.com/pipermail/soekris-tech/2007-May/012035.html">this hint</a> that a BIOS upgrade might solve the problem. Upgrading the BIOS should be simple, right? There&#8217;s a &#8216;download&#8217; command, and then a &#8216;flashbios&#8217; command. The download has to happen with &#8230; Xmodem/CRC. Seriously.</p>
<p>And that turns out to be a bit less than trivial on a modern GNU/Linux system. Minicom has a send file mode, of course, but I couldn&#8217;t get the file across, kept getting errors like &#8216;Retry 0: NAK on sector&#8217;. Minicom was configured to call the &#8216;sx&#8217; command. I tried with &#8216;cu&#8217;, but couldn&#8217;t get that to work either.</p>
<p>In the end I had to </p>
<p>  a) drop speed to 19200 baud<br />
  b) make sure that XON/XOFF flow control was disabled in minicom<br />
  c) start the download with the &#8216;download -&#8217; command in minicom (note that extra dash, presumably a stdin redirection)<br />
  d) quit minicom<br />
  e) from the command line, feed it the new bios like this<br />
       sx -vv b4801_130.bin  /dev/ttyUSB0</p>
<p>That worked:</p>
<p>  Sending b4801_130.bin, 608 blocks: Give your local XMODEM receive command now.<br />
  Bytes Sent:  77824   BPS:1771                            </p>
<p>  Transfer complete</p>
<p>Finally:</p>
<p>  > flashupdate<br />
  Updating BIOS Flash ,,,,,,,,,,,,,,,,,,,,,,,,..,,,,.. Done.        </p>
<p>Apparently, upgrading is also <a href="http://soekris.kd85.com/flashupdate_4801">pretty easy</a> with &#8216;cu&#8217; on openbsd, but the &#8216;lsz&#8217; tool referred there doesn&#8217;t seem to exist in GNU/Linux land.</p>
<p>This was way more complicated than it should have been. I&#8217;m inclined to think that this would be easier if the Soekris ran a free bios &#8211; someone would have managed to squeeze in something a little more sane than xmodem for file transfers. Perhaps something that actually works with standard tools like minicom or cu. In other words, there is room for improvement here. The <a href="http://linuxbios.org">LinuxBIOS</a> project has been making a lot of headway of late with Geode support&#8230;</p>
<p>But at least the BIOS upgrade solved my &#8216;error 16&#8242; problem.</p>
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			<wfw:commentRss>https://ward.vandewege.net/blog/2007/06/flashing-a-soekris-4801-bios-or-how-yet-another-proprietary-bios-sucks/feed/</wfw:commentRss>
		<slash:comments>3</slash:comments>
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		<title>gigabyte m57sli-s4 with extra bios socket</title>
		<link>https://ward.vandewege.net/blog/2007/04/gigabyte-m57sli-s4-with-extra-bios-socket/</link>
		<comments>https://ward.vandewege.net/blog/2007/04/gigabyte-m57sli-s4-with-extra-bios-socket/#comments</comments>
		<pubDate>Wed, 18 Apr 2007 20:57:34 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2007/04/18/124/</guid>
		<description><![CDATA[ST wrote up a nice howto on adding a PLCC socket to the m57sli-s4. This is a great alternative to de-soldering the original chip to add a socket. He still needs to do some more testing, but this sure looks &#8230; <a href="https://ward.vandewege.net/blog/2007/04/gigabyte-m57sli-s4-with-extra-bios-socket/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>ST <a href="http://private.vlsi.informatik.tu-darmstadt.de/st/instructions.html">wrote up</a> a nice howto on adding a PLCC socket to the m57sli-s4.</p>
<p>This is a great alternative to de-soldering the original chip to add a socket. He still needs to do some more testing, but this sure looks promising!</p>
<p>In other news, the <a href="http://linuxbios.org">LinuxBIOS</a> v2 mainline tree now has the m57sli-s4 code merged, so it builds and works properly without need for extra patches. I&#8217;ll update my <a href="http://linuxbios.org/M57SLI-S4_Build_Tutorial">build tutorial</a> shortly.</p>
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			<wfw:commentRss>https://ward.vandewege.net/blog/2007/04/gigabyte-m57sli-s4-with-extra-bios-socket/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
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		<title>FLASH-PLAICE</title>
		<link>https://ward.vandewege.net/blog/2007/04/flash-plaice/</link>
		<comments>https://ward.vandewege.net/blog/2007/04/flash-plaice/#comments</comments>
		<pubDate>Tue, 17 Apr 2007 01:16:12 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2007/04/17/123/</guid>
		<description><![CDATA[Bari Ari wrote to the LinuxBIOS mailing list a couple days ago announcing FLASH-PLAICE: a programmer, logic analyzer and in-circuit flash emulator project that will speed up LinuxBIOS development considerably. The project is based off an inexpensive Xilinx Spartan FPGA &#8230; <a href="https://ward.vandewege.net/blog/2007/04/flash-plaice/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>Bari Ari wrote to the LinuxBIOS mailing list a couple days ago announcing <a href="http://flash-plaice.wikispaces.com/">FLASH-PLAICE</a>: a programmer, logic analyzer and in-circuit flash emulator project that will speed up <a href="http://linuxbios.org">LinuxBIOS</a> development considerably.</p>
<p>The project is based off an inexpensive <a href="http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?key=HW-SPAR3E-SK-US&#038;sGlobalNavPick=&#038;sSecondaryNavPick=">Xilinx Spartan</a> FPGA development board ($150). The idea is to use it to build a flash emulator that can plug into a motherboard flash socket if there is one, or clip onto an existing flash chip if it is soldered onto the board. It would also allow the flashing of a soldered-on chip, even if the board has been &#8216;bricked&#8217;.</p>
<p>Initially, Bari is planning to support SPI flash devices &#8211; but hopefully LPC will be supported soon, too. Most current mainboards use LPC-based PLCC chips &#8211; even though SPI-based boards are starting to appear. Bari is looking for help &#8211; particularly on the PC software side; some sort of tool will need to be written to communicate with the FLASH-PLAICE board. Do get in touch if you can lend a hand!</p>
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			<wfw:commentRss>https://ward.vandewege.net/blog/2007/04/flash-plaice/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
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		<item>
		<title>Gigabyte m57sli-s4 LinuxBIOS build tutorial</title>
		<link>https://ward.vandewege.net/blog/2007/03/gigabyte-m57sli-s4-linuxbios-build-tutorial/</link>
		<comments>https://ward.vandewege.net/blog/2007/03/gigabyte-m57sli-s4-linuxbios-build-tutorial/#comments</comments>
		<pubDate>Mon, 19 Mar 2007 21:45:59 +0000</pubDate>
		<dc:creator><![CDATA[ward]]></dc:creator>
				<category><![CDATA[coreboot]]></category>

		<guid isPermaLink="false">http://ward.vandewege.net/blog/2007/03/19/120/</guid>
		<description><![CDATA[I&#8217;ve written up a LinuxBIOS build tutorial for the Gigabyte m57sli-s4. This tutorial still works off Yinghai Lu&#8217;s big MCP55 patch, but a patch from Ed Swierk hit the list today which resolves the last issues for building the m57sli &#8230; <a href="https://ward.vandewege.net/blog/2007/03/gigabyte-m57sli-s4-linuxbios-build-tutorial/">Continue reading <span class="meta-nav">&#8594;</span></a>]]></description>
				<content:encoded><![CDATA[<p>I&#8217;ve written up a <a href="http://linuxbios.org/M57SLI-S4_Build_Tutorial">LinuxBIOS build tutorial for the Gigabyte m57sli-s4</a>.</p>
<p>This tutorial still works off Yinghai Lu&#8217;s big MCP55 patch, but a patch from Ed Swierk <a href="http://www.openbios.org/pipermail/linuxbios/2007-March/019133.html">hit the list today</a> which resolves the last issues for building the m57sli code (if you disable the USB debug code). I&#8217;ve tested it &#8211; it works fine &#8211; so I hope it will be merged into the tree later today or tomorrow. I&#8217;ll update the tutorial when that happens.</p>
<p>Remaining issues for the m57sli port are: ethernet MAC address changes between proprietary BIOS and LinuxBIOS (but <a href="http://www.openbios.org/pipermail/linuxbios/2007-March/019135.html">that might get resolved soon</a>), and no ACPI support yet.</p>
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		<slash:comments>0</slash:comments>
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